This invention relates to a picture storage device for storing input color picture data used or color picture data in picture processing, such as a picture storage device conveniently employed in conjunction with an electronic still camera or a video camera.
In general, dynamic RAMs or static RAMs are employed most frequently as picture memories. By employing these semiconductor memories as picture memories, data transfer with the picture input/output devices or picture processing devices may be carried out at a high transfer rate.
However, since the DRAM or SRAM has only one input/output port, it is necessary to switch between the accessing to a picture processing device and that to an output device such as a display if it is desirable to carry out picture processing and picture display simultaneously. The result is a complicated construction of the peripheral circuit of the picture memory and a poor processing efficiency.
For overcoming this problem, a dual-port memory for video has been developed and commercialized. This dual port memory for video is a DRAM to which are annexed two ports, namely a random access port and a serial access port. By employing the dual-port memory for video, picture data may be outputted to the display via the serial access port, at the same time as picture data being processed may be inputted to or outputted from the picture processing device via the random access port.
As a picture storage device for storing color picture data, having a data format such that the resolution is 640.times.480 dots, the number of pixel data of the luminance signal Y and two-channel color signals U/V each being eight and the sampling rate of the luminance signals and the two-channel color signals being 4 for luminance signals, Y: 2 for the color signal and U: 2 for the color signal V, four dual-port memories for video VRAM 01 to VRAM 04, each having a storage capacity of 2 Mbits (megabits), as shown in FIG. 1, are employed.
Pixel data Y0.0 to Y319.479 for luminance signals Y are stored in VRAM 01, while pixel data Y320.0 to Y639.479 for luminance signals Y are stored in VRAM 02. On the other hand, two-channel color signals U/V, that is pixel data C0.0 to C319.479 of chroma signals C, are stored in VRAM 03, while two-channel color signals U/V, that is, pixel data C320.0 to C639.479 of chroma signals C, are stored in VRAM 04.
The luminance pixel data Y0.0 to Y639.479 and the chroma pixel data C0.0 to C639.479, recorded in VRAM 01 to VRAM 04, are each made up of 8 bits. On the other hand, VRAM 01 and VRAM 03 or VRAM 02 and VRAM 04 may be accessed simultaneously such that read/write may be carried out in terms of 16 bits as a unit.
If the input color picture data is the non-interlaced data with the vertical frequency of 30 Hz, horizontal frequency of 15.75 kHz and clocks of 14.3 MHz, the input color picture data are transiently stored in a buffer so as to be then written in VRAM 01 to VRAM 04, using a high-speed page mode of the VRAM as shown in FIG. 1. When reading out data written from VRAM 01 to VRAM 04, the data written in VRAM 01 to VRAM 04 may be obtained by sequentially outputting the data from VRAM 01 to VRAM 04.
However, since four expensive VRAMs are required with the conventional picture storage devices, it has not been feasible to lower the production cost.
On the other hand, if VRAM 01 and VRAM 04 are accessed simultaneously, 16-bit data Y0.0/C320.0, made up of 8-bit luminance pixel data Y0.0 and 8-bit luminance pixel data C320.0 are read out. The pixel data of the luminance signals Y and the chroma signals C are each 8 bits, while a data bus transferring the data is of 16-bit width, high-speed data transfer cannot be achieved if the luminance signal Y and the chroma signal C are to be transferred independently.